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MAX6816EUS Rev. A
RELIABILITY REPORT FOR MAX6816EUS PLASTIC ENCAPSULATED DEVICES
February 28, 2003
MAXIM INTEGRATED PRODUCTS 120 SAN GABRIEL DR. SUNNYVALE, CA 94086
Written by
Reviewed by
Jim Pedicord Quality Assurance Reliability Lab Manager
Bryan J. Preeshl Quality Assurance Executive Director
Conclusion The MAX6816 successfully meets the quality and reliability standards required of all Maxim products. In addition, Maxim's continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxim's quality and reliability standards. Table of Contents I. ........Device Description II. ........Manufacturing Information III. .......Packaging Information IV. .......Die Information I. Device Description A. General The MAX6816 is a single switch debouncers that provide clean interfacing of mechanical switches to digital systems. It accepts one or more bouncing inputs from a mechanical switch and produce a clean digital output after a short, preset qualification delay. Both the switch opening bounce and the switch closing bounce are removed. Robust switch inputs handle 25V levels and are 15kV ESD-protected for use in harsh industrial environments. It features a single-supply operation from +2.7V to +5.5V. Undervoltage lockout circuitry ensures the output is in the correct state upon power-up. The single MAX6816 is offered in a SOT package and requirea no external components. It's low supply current makes it ideal for use in portable equipment. B. Absolute Maximum Ratings Item Voltage (with respect to GND) VCC IN_ (Switch Inputs) EN OUT_, CH OUT Short-Circuit Duration (One or Two Outputs to GND) Operating Temperature Range Storage Temperature Range Lead Temperature (soldering, 10sec) Continuous Power Dissipation (TA = +70C) 4-Pin SOT143 Derates above +70C 4-Pin SOT143 Rating -0.3V to +6V -30V to +30V -0.3V to +6V -0.3V to (VCC + 0.3V) Continuous -40C to +85C -65C to +160C +300C 320mW 4.00mW/C V. ........Quality Assurance Information VI. .......Reliability Evaluation ......Attachments
II. Manufacturing Information A. Description/Function: B. Process: C. Number of Device Transistors: D. Fabrication Location: E. Assembly Location: F. Date of Initial Production: 15kV ESD-Protected, Single CMOS Switch Debouncers S3 (Standard 3 micron silicon gate CMOS) 284 Oregon, USA Malaysia or Thailand January, 1999
III. Packaging Information A. Package Type: B. Lead Frame: C. Lead Finish: D. Die Attach: E. Bondwire: F. Mold Material: G. Assembly Diagram: H. Flammability Rating: 4-Pin SOT143 Alloy 42 or Copper Solder Plate Silver-Filled Epoxy Gold (1.0 mil dia.) Epoxy with silica filler # 05-1601-0055 Class UL94-V0
I. Classification of Moisture Sensitivity per JEDEC standard JESD22-A112: Level 1 IV. Die Information A. Dimensions: B. Passivation: C. Interconnect: D. Backside Metallization: E. Minimum Metal Width: F. Minimum Metal Spacing: G. Bondpad Dimensions: H. Isolation Dielectric: I. Die Separation Method: 43 x 30 mils Si3N4/SiO2 (Silicon nitride/ Silicon dioxide) Aluminum/Si (Si = 1%) None 3 microns (as drawn) 3 microns (as drawn) 5 mil. Sq. SiO2 Wafer Saw
V. Quality Assurance Information A. Quality Assurance Contacts: Jim Pedicord (Reliability Lab Manager) Bryan Preeshl (Executive Director) Kenneth Huening (Vice President) B. Outgoing Inspection Level: 0.1% for all electrical parameters guaranteed by the Datasheet. 0.1% For all Visual Defects. C. Observed Outgoing Defect Rate: < 50 ppm D. Sampling Plan: Mil-Std-105D VI. Reliability Evaluation A. Accelerated Life Test The results of the 135C biased (static) life test are shown in Table 1. Using these results, the Failure Rate () is calculated as follows: = 1 = MTTF 1.83 (Chi square value for MTTF upper limit) 192 x 4389 x 80 x 2 Temperature Acceleration factor assuming an activation energy of 0.8eV = 13.57 x 10-9 = 13.57 F.I.T. (60% confidence level @ 25C)
This low failure rate represents data collected from Maxim's reliability monitor program. In addition to routine production Burn-In, Maxim pulls a sample from every fabrication process three times per week and subjects it to an extended Burn-In prior to shipment to ensure its reliability. The reliability control level for each lot to be shipped as standard product is 59 F.I.T. at a 60% confidence level, which equates to 3 failures in an 80 piece sample. Maxim performs failure analysis on any lot that exceeds this reliability control level. Maxim also performs quarterly 1000 hour life test monitors. This data is published in the Product Reliability Report (RR-1M). B. Moisture Resistance Tests Maxim pulls pressure pot samples from every assembly process three times per week. Each lot sample must meet an LTPD = 20 or less before shipment as standard product. Additionally, the industry standard 85C/85%RH testing is done per generic device/package family once a quarter. C. E.S.D. and Latch-Up Testing The MS22 die type has been found to have all pins able to withstand a transient pulse of 2500V, per MilStd-883 Method 3015 (reference attached ESD Test Circuit). Latch-Up testing has shown that this device withstands a current of 250mA and/or 20V.
Table 1 Reliability Evaluation Test Results MAX6816EUS
TEST ITEM TEST CONDITION FAILURE IDENTIFICATION PACKAGE SAMPLE SIZE NUMBER OF FAILURES
Static Life Test (Note 1) Ta = 135C Biased Time = 192 hrs. Moisture Testing (Note 2) Pressure Pot Ta = 121C P = 15 psi. RH= 100% Time = 96hrs. Ta = 85C RH = 85% Biased Time = 1000hrs.
DC Parameters & functionality
80
0
DC Parameters & functionality
SOT143
77
0
85/85
DC Parameters & functionality
77
0
Mechanical Stress (Note 2) Temperature Cycle -65C/150C 1000 Cycles Method 1010 DC Parameters 77 0
Note 1: Life Test Data may represent plastic D.I.P. qualification lots. Note 2: Generic package/process data.
Attachment #1 TABLE II. Pin combination to be tested. 1/ 2/
Terminal A (Each pin individually connected to terminal A with the other floating) 1. 2. All pins except VPS1 3/ All input and output pins
Terminal B (The common combination of all like-named pins connected to terminal B) All VPS1 pins All other input-output pins
1/ Table II is restated in narrative form in 3.4 below. 2/ No connects are not to be tested. 3/ Repeat pin combination I for each named Power supply and for ground (e.g., where VPS1 is VDD, VCC, VSS, VBB, GND, +VS, -VS, VREF, etc).
3.4 a.
Pin combinations to be tested. Each pin individually connected to terminal A with respect to the device ground pin(s) connected to terminal B. All pins except the one being tested and the ground pin(s) shall be open. Each pin individually connected to terminal A with respect to each different set of a combination of all named power supply pins (e.g., VSS1, or VSS2 or VSS3 or VCC1, or VCC2) connected to terminal B. All pins except the one being tested and the power supply pin or set of pins shall be open. Each input and each output individually connected to terminal A with respect to a combination of all the other input and output pins connected to terminal B. All pins except the input or output pin being tested and the combination of all the other input and output pins shall be open.
b.
c.
TERMINAL C
R1 S1 R2
TERMINAL A REGULATED HIGH VOLTAGE SUPPLY
S2 C1
DUT SOCKET
SHORT CURRENT PROBE (NOTE 6)
TERMINAL B
R = 1.5k C = 100pf
TERMINAL D Mil Std 883D Method 3015.7 Notice 8

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